This application is based on Japanese Patent Application Nos. 2000-101305 filed on Mar. 31, 2000, 2000-232985 filed on Aug. 1, 2000, and 2001-27323, filed on Feb. 2, 2001, the contents of which are incorporated herein by reference.
1. Field of the Invention
The present invention relates to a semiconductor switching element driving circuit having an overcurrent protection function, in particular, which is preferably applied to a circuit for driving an IGBT or the like that is used in a motor driving circuit of an electric vehicle or the like.
2. Related Arts
In the case of using a semiconductor switching element, e.g. the IGBT for driving a motor, when a load short circuit or the like occurs, a collector current of the IGBT rapidly increases and the IGBT is broken by an overcurrent or heat. Therefore, in order to prevent the IGBT from being destroyed, there is a need to detect the overcurrent to cut off the IGBT by a protection circuit within a short time.
However, since there is a case where noises equivalent to the overcurrent occur, malfunctions due to such noises must be prevented. On this account, cutting off the IGBT at high speed while retaining a malfunction withstand capacity is difficult.
Additionally, when a gate voltage is cut off, a voltage is varied from a normal driving voltage to 0V at high speed and thus a rate of a current change xe2x88x92dI/dt at the high-speed cutoff becomes great, a jumping voltage caused by a wiring inductance is increased and the IGBT may be broken by an excess current caused by breakdown due to the jumping voltage larger than a withstand voltage.
A semiconductor switching element driving circuit that solves the above problems is described in the Japanese Patent Laid-Open Application No. 64707/1997. The semiconductor switching element driving circuit described in this publication is shown in FIG. 11.
This conventional semiconductor switching element driving circuit has a configuration in which a short circuit protection transistor 104 is disposed between a gate terminal 101a and a sense terminal (current detecting emitter terminal) 101b of the IGBT 101 for being turned on faster than a short circuit delay time T1 determined by a comparator 102 and a driver circuit 103, and a condenser 105 is disposed between the sense terminal 101b of the IGBT 101 and an earth for prevention of the malfunctions due to the noises.
By such a configuration, as the condenser 105 prevents the malfunctions due to the noises, when the overcurrent occurs due to the load short circuit, the short circuit protection transistor 104 is turned on faster than the delay time T1 to decrease a gate voltage Vge of the IGBT 101 and after the delay time T1 has passed, the IGBT 101 is to be cut off by the driver circuit 103. Thereby, the semiconductor switching element driving circuit that is robust to the malfunctions due to the noises and capable of cutting off the IGBT 101 at high speed is realized.
Recently, the IGBT or the like has also been used in driving a motor of the electric vehicle or the like in which high voltages are applied. A motor driving circuit of such an electric vehicle is shown in FIG. 12. As shown in this drawing, a three-phase driving circuit, for example, is used for the motor driving circuit.
In such a motor driving circuit, when a load short circuit such that windings in a motor 110 short-circuit each other occurs, or when a short circuit occurs between wirings to each phase, or when an arm short circuit such that IGBTs 111 arranged above and below as shown in FIG. 12 are brought to the on state at the same time because of the malfunctions occurs, an overcurrent (short circuit current) that becomes large to a great extent in a relatively short time is generated. On the other hand, when a motor lock or the like occurs, an overcurrent that is smaller than the short circuit current is generated for a relatively long time.
In case that the conventional semiconductor switching element driving circuit is applied to such a motor driving circuit, as for the overcurrent caused by the motor lock or the like, the IGBT 101 is cut off at high speed by the operation set forth and a flow through the IGBT 101 can be prevented. However, as for the above described short circuit current caused by the load short circuit or the arm short circuit the condenser 105 prevents an instantaneous response. Thus, the flow of the short circuit current through the IGBT 101 cannot be prevented. Furthermore, the short circuit current flowing at this time greatly increases in magnitude (five-fold or more of a rated current, for example) because an extremely large motor driving voltage. Consequently, the IGBT might be damaged.
Additionally, since the conventional semiconductor switching element driving circuit cannot turn off the overcurrent until the delay time T1 passes, the overcurrent is also supplied to the other IGBTs shown in FIG. 12 and it causes a motor system to have a problem.
In light of the points as set forth, the purpose of the invention is to provide a semiconductor switching element driving circuit capable of controlling the overcurrent that increases instantaneously and of conducting the high-speed cutoff of the semiconductor switching element particularly in a device which high voltages are required.
This invention has been conceived in view of the background as described above and an object of the invention is preferably to prevent a semiconductor switching element from being destroyed due to an overcurrent caused by a short circuit and the like.
According to the present invention, the semiconductor switching element driving circuit comprises a semiconductor switching element having a gate terminal, a first terminal and a second terminal for carrying a main current between the first and second terminals by applying a voltage to the gate terminal, an overcurrent protection circuit for first decreasing the main current at a first slope and then reducing the main current at a second slope steeper than said first slope when the main current becomes a first overcurrent that exceeds a predetermined current value for a period of time equal to or longer than a predetermined period of time, and an overcurrent limiting circuit for instantaneously dropping a voltage applied to the gate terminal when the main current becomes a second overcurrent larger than said first overcurrent within a shorter period of time than said predetermined period of time.
In this manner, when the second overcurrent (short circuit current) is caused by a load short circuit, an arm short circuit or the like, a voltage applied to a gate terminal is dropped instantaneously by the overcurrent limiting circuit so that the overcurrent can be prevented from flowing into the semiconductor switching element. Additionally, when the first overcurrent smaller than the short circuit current that is generated for a relatively long time is caused by a motor lock or the like, the overcurrent protection circuit first decreases the main current at the first inclination and then reduces the main current at the second inclination steeper than the first inclination, whereby the high-speed cutoff of the semiconductor switching element can be conducted while preventing the effect of the jumping voltage due to the wiring inductance. Therefore, the overcurrent which increases instantaneously can be controlled and the high-speed cutoff of the semiconductor switching element can be conducted.
For example, as shown in claim 2, the overcurrent limiting circuit may reduce the voltage of the gate terminal in the case that it becomes a larger current within a shorter period of time than a delay time in the circuit.
According to the other aspect of the present invention the semiconductor switching element driving circuit comprises the overcurrent limiting circuit for instantaneously dropping a voltage of the gate terminal when the main current becomes larger than a first comparison current, and the overcurrent protection circuit for first decreasing the main current at a first inclination when the main current becomes larger than a second comparison current that is lower than the first comparison current and then reducing the main current at a second inclination steeper than the first inclination when the main current becomes smaller than a third comparison current that is lower than the second comparison current.
In this manner, when the main current has become larger than the first comparison current, the gate voltage can be dropped instantaneously by the overcurrent limiting circuit. In addition, the main current is decreased at the first inclination when the main current becomes larger than the second comparison current and the main current is reduced at the second inclination steeper than the first inclination when the main current becomes smaller than the third comparison current. Thus, the high-speed cutoff of the semiconductor switching element can be conducted while the effect of the jumping voltage due to the wiring inductance is prevented. Furthermore, regardless of a period of time after the overcurrent has occurred, the main current is suddenly dropped at the time when the main current has become smaller than the third comparison current so that the overcurrent can also be prevented from inevitably flowing through for a fixed time.
According to another aspect of the present invention, the semiconductor switching element driving circuit comprises a semiconductor switching element having a gate terminal, a first terminal and a second terminal for carrying a main current between the first and second terminals by applying a control voltage to the gate terminal, said semiconductor switching element outputting a detection current substantially proportional to the main current from a detection terminal; and an overcurrent limiting circuit for adjusting the control voltage applied to said gate terminal so that said main current becomes equal to or under a predetermined current value, wherein said overcurrent limiting circuit comprises a current detection resistance connected to a detection terminal for converting said detection current outputted from the detection terminal into a detection voltage, a detection resistance switching unit for decreasing a resistance value of said current detection resistance until said gate voltage applied to the gate terminal is under a reference voltage which is lower than a full-on voltage by which said semiconductor switching element becomes a full on state.
The full on state as described here is a state that the semiconductor device resides in a saturated region and an on resistance becomes smallest.
In this manner, until a control voltage (a gate voltage) reaches a predetermined resistance switching voltage value during current carrying through an electric load (i.e, semiconductor switching element), a detection resistance switching unit reduces the resistance value of the current detection resistance. Thus, a voltage drop by the current detection resistor whose resistance value has been reduced is inputted into an overcurrent protecting unit as a detected voltage. Therefore, in the case that the control voltage is low and a ratio of the detected voltage to the current carrying through the load is great (i.e., the current mirror ratio is small), the resistance value of the current detection resistor is decreased to allow a protecting operation not to be conducted with a small amount of the current carrying through the semiconductor switching element (the reduction in the control voltage by the overcurrent protecting unit).
While in the case that the control voltage is high and the ratio of the detected current to the current carrying through the semiconductor switching element is small (i.e., the current mirror ratio is great), the resistance value of the current detection resistor is held as it is (a value greater than the resistance value for the period of time until the control voltage reaches the resistance switching voltage value) and even a small amount of the detected current can conduct the protecting operation.